In some integrated circuits, a memory cell may be disposed a large distance (e.g., 100 microns or more) from a data or address driver used to transmit or read data from the memory cell. That is, the memory cell may have long data or address lines that connect the cell to the data and address drivers. These long data and address lines have large RC time constants which can slow down the write/read speeds or reduce the write margins. To overcome the RC time constants (and improve speeds and write margins), the voltage on the address lines can be increased; however, this only improves the RC time constant at the pass gates in the memory cell which may not be sufficient to counter the detrimental RC time constant of the data lines.
Instead, one or more buffers (e.g., simplified driver circuits) can be disposed along the length of the data lines between the data driver and the memory cell. However, the circuitry in the buffers takes up space and increases the complexity of the integrated circuit. Further, it may be impossible or difficult to test the buffers to ensure their proper operation. If a buffer malfunctions, this may prevent the connected memory cell or cells from operating properly. Thus, developing memory cells that are immune to, or mitigate, the detrimental RC constants from long data lines, and thus, do not need buffers in the data lines, can reduce cost and complexity of an integrated circuit.